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Semiconductor design and production are critical to building tech products such as laptops, phones and AI models today, and this design push seeks to address a key gap in India’s semiconductor ambitions.

While the country has emerged as a major global base for chip-design engineers, much of this work is currently done for multinational semiconductor companies. Here is what Semicon 2.0 aims to do.

Semicon 2.0 seeks to build more Indian-owned intellectual property and fabless semiconductor companies — firms that design and sell chips while outsourcing the work of physical fabrication.

The operational framework notified on August 31 puts chip design at the front of the new semiconductor mission. Of the programme’s six pillars and 10 categories, the first pillar is entirely focused on design, with separate tracks for chips required for national and strategic priorities, commercial semiconductor products, and a deployment-linked incentive for newly developed chips.

The first track targets semiconductor technologies considered important for national security and critical infrastructure. The government will identify IP, chips, systems-on-chip (SoCs) and modules that it wants developed, including building blocks for compute, memory, radio frequency, power, networking and sensors.

Companies participating in this category must be incorporated and headquartered in India, have a significant operational and manpower presence in the country, and be owned and controlled by Indian citizens. They can, however, work with global companies, research organisations and academic institutions in consortiums.

The second track is meant for commercial chip-design companies. Here, the government will provide access to expensive electronic design automation tools, multi-project wafer fabrication services and other systems.

Start-ups and MSMEs can receive milestone-linked seed funding of up to Rs 15 crore, or 50% of the project cost, whichever is lower. The government can also make equity co-investments alongside venture capital and private equity investors. Larger eligible companies can opt for royalty financing, under which they will pay 5% of the net revenue from the supported product until 1.5 times the government assistance has been recovered.

For this commercial category, eligibility has also been widened to companies owned and controlled by Overseas Citizens of India (OCIs), provided they are incorporated and headquartered in India and maintain a significant operational and manpower presence here. The IP and associated design and development files must remain in India.

Experts said the scheme would help further investments in the ecosystem. “Based on the current investment pipeline and the much broader scope of Semicon 2.0, (we) see the potential for the programme to catalyse more than Rs 5 lakh crore of cumulative private and industry investment over the next five to seven years across fabs, ATMP/OSAT (assembly and testing), equipment and materials, design, R&D and the wider supply chain,” said Ashok Chandak, president of the India Electronics and Semiconductor Association (IESA), and industry association SEMI India.

“I was also glad to see that the scheme has this time been opened up to companies owned by Overseas Citizens of India which is a very good decision, since they bring rich global experience that will help create truly advanced design companies in India,” said Arjun Malhotra, co-founder of HCL and chairperson of the EPIC Foundation.

Semicon 2.0 further introduces a separate deployment-linked incentive, aimed at the next problem after successfully designing a chip: getting customers to adopt it at scale.

Eligible semiconductor IP, chips and SoCs launched after the scheme’s announcement will receive a reimbursement equivalent to 9% of their net sales for five years. The benefit is capped at Rs 30 crore per application and Rs 120 crore for a company, including its group entities, across multiple products.

This is particularly relevant for young fabless companies, which can face hurdles convincing electronics manufacturers to switch from established overseas semiconductor suppliers to a newly developed Indian chip.

The scheme is also aimed at filling gaps across the semiconductor supply chain.

Companies setting up semiconductor-equipment R&D facilities, plants manufacturing wafers, photomasks, photoresists, substrates, chemicals and gases, testing facilities, or units producing semiconductor equipment and components can receive 30% capital expenditure support. Equipment manufacturers will additionally get a production-linked incentive that declines from 10% to 2% over five years on the value of their bill of materials sourced domestically.

Large silicon wafer fabs will be eligible for 40% capex support, while compound semiconductor, photonics, sensor and discrete semiconductor fabs can receive 35%. Advanced chip-packaging facilities will receive 35%, compared with 25% for legacy packaging. These incentives have reduced compared to the uniform 50% capex subsidy the government had offered in the first iteration of the scheme, introduced in 2021 to build a full-stack chip ecosystem.

The first semiconductor mission has resulted in approvals for 12 manufacturing projects, including Micron’s assembly and testing facility and Tata Electronics’ wafer fab being developed with Taiwan’s PSMC. Micron, Kaynes Semicon and CG Semi have started commercial production, while the Tata fab remains under construction.

Talent development has been carved out as a separate pillar under Semicon 2.0. The government wants to train not only chip designers, but also engineers, researchers, technicians and shop-floor operators required across fabrication and packaging plants.

“India achieved its target of developing 85,000 semiconductor engineers over a period of 10 years in just four years, and has now set a new target of developing one lakh more engineers… Students from tier-II and tier-III cities have already designed more than 250 chips… The semiconductor ecosystem being developed in India is also expected to create 50,000 – 60,000 direct jobs,” said IT Minister Ashwini Vaishnaw.

On the design side, support will cover access to advanced chip-design tools, multi-project wafer services and post-silicon validation facilities. On the manufacturing side, the scheme will support dedicated training infrastructure and strengthen existing nanofabrication and process laboratories. Eligible projects can receive support of up to 75% of their cost, including state incentives.